Andrew Rogers
3c216356b6
Currently my silly-cc project kind of sucks, but I need a way to
generate my compile commands for LSP on Makefile-based and
Autotools-based projects. This shell script should work most of the
time provided your Makefiles aren't silencing the emission of compile
commands with a prepending dash ("-") on targets that we care about.
51 lines
1,010 B
Bash
Executable file
51 lines
1,010 B
Bash
Executable file
#!/usr/bin/env bash
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: '
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* Attempt to generate clangd compile commands for a GNU Make target.
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'
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. "$(dirname $0)/util/logging.bash"
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define_usage <<EOU
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Usage: $0 [-h] [-C MAKE_DIR] [-f MAKEFILE] [MAKE_TARGET]
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OPTIONS
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-h Display this help.
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-C DIR Run GNU Make in specific directory. See make(1) for more info.
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-f MAKEFILE Tell GNU Make to use a specific Makefile. See make(1) for more
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info.
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-d Run this program in "debug" mode.
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EOU
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MAKEFILE=''
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MAKEDIR=''
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DEBUG=0
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while getopts 'hdC:f:' opt; do
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case "${opt}" in
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h)
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xcat <<<"$usage"
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;;
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d)
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DEBUG=1
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;;
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C)
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MAKEDIR="-C'$OPTARG'"
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;;
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f)
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MAKEFILE="--file='$OPTARG'"
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;;
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esac
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done
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shift $((OPTIND-1))
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[ "$DEBUG" -ne 0 ] && set -x
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make "$MAKEDIR" "$MAKEFILE" --always-make --dry-run ${@} \
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| grep -E '^\s*gcc|^\s*g\+\+|^\s*clang|^\s*clang\+\+' \
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| grep -w '\-c' \
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| jq -nR '[inputs|{directory:".", command:., file: match(" [^ ]+$").string[1:]}]'
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